About Us

Crosstalk knowledge about high-speed PCB design

In the learning process of high-speed PCB design, crosstalk is an important concept that needs to be mastered. It is the main way of electromagnetic interference propagation, asynchronous signal line, control line, and I/O port line, crosstalk will make the circuit or component function abnormal phenomenon.


Refers to when the signal transmitted on a transmission line, on the adjacent transmission line by electromagnetic coupling of unwanted voltage noise interference.This interference is caused by mutual inductance and mutual capacitance between the transmission line.The parameters of the PCB layer, the spacing of the signal lines, the electrical characteristics of the driver end and the receiver end, and the termination mode of the line all have certain effects on the crosstalk.

The main measures to overcome crosstalk are:

● Increase the parallel wiring spacing, follow the 3W rule;

● Insert a grounded isolation line between parallel lines;

● Reduce the distance between the wiring layer and the ground plane.

3W rule

In order to reduce the crosstalk between the lines, the spacing between the lines should be large enough. When the spacing between the lines is not less than 3 times the line width, 70% of the electric field can be kept without interfering with each other, which is called the 3W rule.To achieve 98% electric fields do not interfere with each other, a spacing of 10W can be used.

(Note: In actual PCB design, the 3W rule does not fully meet the requirements of avoiding crosstalk.)

Ways to avoid crosstalk in PCBS

In order to avoid crosstalk in the PCB, engineers can consider PCB design and layout aspects, such as:

1,   Classification of logic device series according to function, keeping the bus structure strictly controlled;

2,The physical distance between minimize components;

3,High-speed signal lines and components (such as crystal oscillators) should be kept away from I/O interconnects and other areas susceptible to data interference and coupling;

4,Provide correct terminations for high-speed lines;

5,Avoid long distance parallel wiring and provide sufficient spacing between wires to minimize inductive coupling;

6,The wiring on the adjacent layers (microstrip or strip line) should be perpendicular to each other to prevent capacitive coupling between the layers;

7,Reduce the distance between the signal and the ground plane;

8,Segmentation and isolation of high-noise emission sources (clock, I/O, high-speed interconnect) with different signals distributed in different layers;

9,Increase the distance between signal lines as much as possible, which can effectively reduce the tolerant crosstalk;

10,The lead inductance is reduced to avoid the circuit using loads with very high impedance and loads with very low impedance, and the analog circuit load impedance is as stable as possible between 10Ω and 10kΩ.Because high impedance loads will increase capacitive crosstalk, when using very high impedance loads, the capacitive crosstalk will increase due to the high operating voltage, while when using very low impedance loads, the inductive crosstalk will increase due to the high operating current;

11,The high-speed cycle signal is arranged on the inner layer of the PCB board;

12,Impedance matching technology is used to ensure signal integrity and prevent overshooting;

13,Pay attention to the signal with a fast rising edge (tr≤3ns), such as anti-crosspoint processing, some signal lines that are interfered with by EFTlB or ESD and are not filtered are arranged on the edge of the PCB;

14,Try to use the ground plane, the signal line using the ground plane will get 15 to 20dB attenuation compared to the signal line without the ground plane;

15,High-frequency signals and sensitive signals are processed in the ground, and the use of the ground technology in the dual panel will obtain 10 ~ 15dB attenuation;

16,Use balanced lines, shielded lines or coaxial lines;

17,The disturbance signal line and sensitive line are filtered;

18,Reasonable setting of layers and wiring, reasonable setting of wiring layers and wiring spacing, reducing parallel signal length, shortening the distance between signal layer and plane layer, increasing signal line spacing, reducing parallel signal line length (within the critical length range), these measures can effectively reduce crosstalk;

Engineers should have the following three aspects of knowledge when conducting signal quality tests:

1,Have a clear understanding of the measuring tool (oscilloscope), to understand the performance of the oscilloscope, master the use of the oscilloscope and its probe, and clear the relationship between the test of abnormal signal quality and the oscilloscope menu setting;

2,Have a comprehensive and clear understanding of the abnormal signal form, and have an understanding of the abnormal indicators of the abnormal signal;

3,Have a certain knowledge and understanding of the principle circuit of the board under test, be able to classify the signal, understand the key devices on the board, the key bus, the signal quality requirements of the key signal and the relevant timing parameters;

Basic Information
  • Year Established
  • Business Type
  • Country / Region
  • Main Industry
  • Main Products
  • Enterprise Legal Person
  • Total Employees
  • Annual Output Value
  • Export Market
  • Cooperated Customers
Chat with Us

Send your inquiry

Choose a different language
Current language:English